发明授权
- 专利标题: Programmable logic device architecture for accommodating specialized circuitry
- 专利标题(中): 用于容纳专用电路的可编程逻辑器件架构
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申请号: US11230002申请日: 2005-09-19
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公开(公告)号: US07525340B2公开(公告)日: 2009-04-28
- 发明人: Sergey Y Shumarayev , Rakesh H Patel , Chong H Lee
- 申请人: Sergey Y Shumarayev , Rakesh H Patel , Chong H Lee
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Ropes & Gray LLP
- 代理商 Jeffrey H. Ingerman
- 主分类号: G09F7/38
- IPC分类号: G09F7/38 ; H03K19/173 ; H03K19/177 ; H01L25/00
摘要:
A programmable logic device (PLD) having one or more programmable logic regions and one or more conventional input/output regions additionally has one or more peripheral areas including specialized circuitry. The peripheral specialized regions, which are not connected to the remainder of the programmable logic device (and may be made on separate dies from the remainder of the programmable logic device mounted on a common substrate), and one or both of the programmable logic regions and the conventional I/O regions, have contacts for metallization traces or other interconnections to connect the peripheral specialized regions to the remainder of the programmable logic device. The same PLD can be sold with or without the specialized circuitry capability by providing or not providing the interconnections. The peripheral specialized regions may include high-speed I/O (basic, up to about 3 Gbps, and enhanced, up to about 10-12 Gbps), as well as other types of specialized circuitry.