Invention Grant
- Patent Title: Recessed gate structure and method for preparing the same
- Patent Title (中): 嵌入式门结构及其制备方法
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Application No.: US11435848Application Date: 2006-05-18
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Publication No.: US07557407B2Publication Date: 2009-07-07
- Inventor: Ting Sing Wang
- Applicant: Ting Sing Wang
- Applicant Address: TW Hsinchu
- Assignee: Promos Technologies Inc.
- Current Assignee: Promos Technologies Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Oliff & Berridge, PLC
- Priority: TW95108687A 20060315
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119

Abstract:
A recessed gate structure comprises a semiconductor substrate, a recess positioned in the semiconductor substrate, a gate oxide layer positioned in the recess and a conductive layer positioned on the gate oxide layer, wherein the semiconductor substrate has a multi-step structure in the recess. The thickness of the gate oxide layer on one step surface can be different from that on another step surface of the multi-step structure. In addition, the recessed gate structure further comprises a plurality of doped regions positioned in the semiconductor substrate under the multi-step structure, and these doped regions may use different dosages and different types of dopants. There is a carrier channel in the semiconductor substrate under the recessed gate structure and the overall channel length of the carrier channel is substantially the summation of the lateral width and twice of the vertical depth of the recessed gate structure.
Public/Granted literature
- US20070218638A1 Recessed gate structure and method for preparing the same Public/Granted day:2007-09-20
Information query
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