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发明授权
US07602028B2 NAND flash memory devices having 3-dimensionally arranged memory cells and methods of fabricating the same 有权
具有三维排列的存储单元的NAND闪存器件及其制造方法

NAND flash memory devices having 3-dimensionally arranged memory cells and methods of fabricating the same
摘要：
A NAND flash memory device includes a lower semiconductor layer and an upper semiconductor layer located over the lower semiconductor layer, a first drain region and a first source region located in the lower semiconductor layer, and a second drain region and a second source region located in the upper semiconductor layer. A first gate structure is located on the lower semiconductor layer, and a second gate structure is located on the upper semiconductor layer. A bit line is located over the upper semiconductor layer, and at least one bit line plug is connected between the bit line and the first drain region, where the at least one bit line plug extends through a drain throughhole located in the upper semiconductor layer.
摘要（中）：

NAND闪速存储器件包括下半导体层和位于下半导体层上的上半导体层，位于下半导体层中的第一漏区和第一源区，以及位于下半导体层中的第二漏区和第二源区 上半导体层。 第一栅极结构位于下半导体层上，第二栅极结构位于上半导体层上。 位线位于上半导体层上方，并且至少一位位线插头连接在位线和第一漏极区之间，其中至少一位位线插头延伸穿过位于上半导体层中的漏极通孔。

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