Invention Grant
- Patent Title: Insulated gate-type semiconductor device and manufacturing method of the same
- Patent Title (中): 绝缘栅型半导体器件及其制造方法
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Application No.: US11023961Application Date: 2004-12-29
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Publication No.: US07629644B2Publication Date: 2009-12-08
- Inventor: Masahito Onda , Hirotoshi Kubo , Shouji Miyahara , Hiroyasu Ishida , Hiroaki Saito
- Applicant: Masahito Onda , Hirotoshi Kubo , Shouji Miyahara , Hiroyasu Ishida , Hiroaki Saito
- Applicant Address: JP Moriguchi-shi
- Assignee: Sanyo Electric Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.
- Current Assignee Address: JP Moriguchi-shi
- Agency: Morrison & Foerster LLP
- Priority: JP2004-013426 20040121
- Main IPC: H01L29/76
- IPC: H01L29/76
Abstract:
An interlayer dielectric film is completely buried in a trench, and failures caused by step coverage is prevented because a source electrode can be formed substantially uniformly on an upper portion of a gate electrode. Also, in the processes of forming a source region, a body region and an interlayer dielectric film, only one mask is necessary so that the device size is reduced to account for placement error of only one mask alignment.
Public/Granted literature
- US20050167748A1 Insulated gate-type semiconductor device and manufacturing method of the same Public/Granted day:2005-08-04
Information query
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