发明授权
- 专利标题： Non-invasive, low pin count test circuits and methods
- 专利标题（中）： 非侵入性，低引脚数测试电路和方法
-
申请号： US11410362申请日： 2006-04-25
-
公开(公告)号： US07639002B1公开(公告)日： 2009-12-29
- 发明人: Murari Kejariwal , Prisad Ammisetti , Axel Thomsen , John Laurence Melanson
- 申请人： Murari Kejariwal , Prisad Ammisetti , Axel Thomsen , John Laurence Melanson
- 申请人地址： US TX Austin
- 专利权人： Cirrus Logic, Inc.
- 当前专利权人： Cirrus Logic, Inc.
- 当前专利权人地址： US TX Austin
- 代理机构： Thompson & Knight LLP
- 代理商 James J. Murphy
- 主分类号： G01R31/28
- IPC分类号： G01R31/28
摘要：
A method of testing an integrated circuit including a plurality of test nodes includes initiating a test mode and, during a first time interval of the test mode, stepping a level of a supply current of the integrated circuit to a calibration level. Parameters are observed at the plurality of test nodes to detect errors during a second time interval of the test mode and the level of the supply current selectively stepped in response to a number of errors detected. The level of the supply current is decoded to identify the detected errors.
信息查询
