发明授权
- 专利标题： Semiconductor device with reduced fringe capacitance
- 专利标题（中）： 具有降低的边缘电容的半导体器件
-
申请号： US11823892申请日： 2007-06-29
-
公开(公告)号： US07642603B2公开(公告)日： 2010-01-05
- 发明人: Suman Datta , Titash Rakshit , Jack T. Kavalieros , Brian S. Doyle
- 申请人： Suman Datta , Titash Rakshit , Jack T. Kavalieros , Brian S. Doyle
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Trop, Pruner & Hu, P.C.
- 主分类号： H01L29/76
- IPC分类号： H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要：
In one embodiment of the invention, a non-planar transistor includes a gate electrode and multiple fins. A trench contact is coupled to the fins. The contact bottom is formed above the substrate and does not directly contact the substrate. The contact bottom is higher than the gate top.
公开/授权文献
- US20090001474A1 Semiconductor device with reduced fringe capacitance 公开/授权日：2009-01-01
信息查询
IPC分类:
