Invention Grant
- Patent Title: Method for manufacturing electronic components, mother substrate, and electronic component
- Patent Title (中): 电子部件,母材,电子部件的制造方法
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Application No.: US10599368Application Date: 2005-05-27
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Publication No.: US07663225B2Publication Date: 2010-02-16
- Inventor: Kazuhide Kudo , Minoru Matsunaga
- Applicant: Kazuhide Kudo , Minoru Matsunaga
- Applicant Address: JP Kyoto
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Kyoto
- Agency: Keating & Bennett, LLP
- Priority: JP2004-216029 20040723
- International Application: PCT/JP2005/009779 WO 20050527
- International Announcement: WO2006/011291 WO 20060202
- Main IPC: H01L41/083
- IPC: H01L41/083 ; H01F17/00 ; H01F27/00 ; H01F27/28 ; H05K7/06 ; H05K3/02 ; H05K3/10 ; H05K3/36

Abstract:
In a manufacturing process of electronic components which include conductive patterns laminated with insulating layers provided therebetween, conductive pattern layers having conductive patterns formed at intervals therebetween along layer surfaces and insulating layers are alternately laminated to each other. The laminate is pressed by applying a force thereto in the lamination direction, followed by cutting of the laminate along cutting lines provided along boundaries between the electronic components, so that the electronic components are separated from each other. In a cutting-removal region of a mother substrate from which the electronic components are separated from each other by cutting, removal dummy patterns having a size allowing it to be disposed within the above region are formed. In the electronic component, floating dummy patterns which are not electrically connected to the conductive patterns are formed at intervals from the cutting-removal region.
Public/Granted literature
- US20070199734A1 Method For Manufacturing Electronic Components, Mother Substrate, And Electronic Component Public/Granted day:2007-08-30
Information query
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