Invention Grant
US07696052B2 Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions
有权
通过使漏极和源极区域凹陷来在靠近沟道区域的晶体管中提供应力源的技术
- Patent Title: Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions
- Patent Title (中): 通过使漏极和源极区域凹陷来在靠近沟道区域的晶体管中提供应力源的技术
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Application No.: US11558006Application Date: 2006-11-09
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Publication No.: US07696052B2Publication Date: 2010-04-13
- Inventor: Andy Wei , Thorsten Kammler , Jan Hoentschel , Manfred Horstmann , Peter Javorka , Joe Bloomquist
- Applicant: Andy Wei , Thorsten Kammler , Jan Hoentschel , Manfred Horstmann , Peter Javorka , Joe Bloomquist
- Applicant Address: US TX Austin
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US TX Austin
- Agency: Williams, Morgan & Amerson, P.C.
- Priority: DE102006015077 20060331
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
By recessing drain and source regions, a highly stressed layer, such as a contact etch stop layer, may be formed in the recess in order to enhance the strain generation in the adjacent channel region of a field effect transistor. Moreover, a strained semiconductor material may be positioned in close proximity to the channel region by reducing or avoiding undue relaxation effects of metal silicides, thereby also providing enhanced efficiency for the strain generation. In some aspects, both effects may be combined to obtain an even more efficient strain-inducing mechanism.
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