Invention Grant
- Patent Title: Quad state to two state interface circuitry with clock input
- Patent Title (中): 四态到具有时钟输入的两个状态接口电路
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Application No.: US12431330Application Date: 2009-04-28
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Publication No.: US07768305B2Publication Date: 2010-08-03
- Inventor: Lee D. Whetsel
- Applicant: Lee D. Whetsel
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/02
Abstract:
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring interconnects between memories and logic elements results in higher speed, higher density, and lower power integrated circuit designs.
Public/Granted literature
- US20090206877A1 QUAD STATE LOGIC DESIGN METHODS, CIRCUITS AND SYSTEMS Public/Granted day:2009-08-20
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