发明授权
US07772126B2 Hard mask arrangement, contact arrangement and methods of patterning a substrate and manufacturing a contact arrangement 有权
硬掩模布置,接触布置以及图案化基板和制造接触布置的方法

  • 专利标题: Hard mask arrangement, contact arrangement and methods of patterning a substrate and manufacturing a contact arrangement
  • 专利标题(中): 硬掩模布置,接触布置以及图案化基板和制造接触布置的方法
  • 申请号: US11583145
    申请日: 2006-10-19
  • 公开(公告)号: US07772126B2
    公开(公告)日: 2010-08-10
  • 发明人: Lars Bach
  • 申请人: Lars Bach
  • 申请人地址: DE Munich
  • 专利权人: Qimonda AG
  • 当前专利权人: Qimonda AG
  • 当前专利权人地址: DE Munich
  • 代理机构: Edell, Shapiro & Finnan, LLC
  • 主分类号: H01L21/467
  • IPC分类号: H01L21/467
Hard mask arrangement, contact arrangement and methods of patterning a substrate and manufacturing a contact arrangement
摘要:
An interlayer is disposed on a pattern surface of a substrate. A buried hard mask may be provided on the interlayer. The buried hard mask includes a template opening having a template length along a line axis and a template width perpendicular thereto. The buried hard mask is filled with a fill material. A top mask is provided above the filled buried hard mask. The top mask includes a trim opening crossing the template opening and having a trim width along the line axis that is smaller than the template length. By etching the fill material and the interlayer using the top and buried hard mask a process section of the pattern surface may be exposed such that a target length and width of the process section result from the template and the trim widths. The planar dimensions of the process section may be decoupled from each other.
信息查询
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02 .半导体器件或其部件的制造或处理
H01L21/04 ..至少具有一个跃变势垒或表面势垒的器件,例如PN结、耗尽层、载体集结层
H01L21/34 ...具有H01L21/06,H01L21/16及H01L21/18各组不包含的或有或无杂质,例如掺杂材料的半导体的器件
H01L21/46 ....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的(在半导体材料上制作电极的入H01L21/44)
H01L21/461 .....改变半导体材料的表面物理特性或形状的,例如腐蚀、抛光、切割
H01L21/465 ......化学或电处理,例如电解腐蚀(形成绝缘层的入H01L21/469)
H01L21/467 .......应用掩膜的
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