发明授权
- 专利标题: Semiconductor integrated circuit
- 专利标题(中): 半导体集成电路
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申请号: US12246873申请日: 2008-10-07
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公开(公告)号: US07788565B2公开(公告)日: 2010-08-31
- 发明人: Takako Nishiyama , Hideo Ito
- 申请人: Takako Nishiyama , Hideo Ito
- 申请人地址: JP Moriguchi-shi JP Gunma
- 专利权人: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- 当前专利权人: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- 当前专利权人地址: JP Moriguchi-shi JP Gunma
- 代理机构: Morrison & Foerster LLP
- 优先权: JP2007-266860 20071012
- 主分类号: G01R31/28
- IPC分类号: G01R31/28
摘要:
A semiconductor integrated circuit having a low maximum allowable operating frequency such as an analog circuit can be prevented from being destroyed during a scan test. When a scan test mode signal is “1”, output signals of a first AND circuit and a second AND circuit are fixed to a low level and an output of an OR circuit is fixed to a high level. Therefore, output signals of fourth through sixth flip-flops FF4-FF6 are not transferred to first through third analog circuits during the scan test. On the other hand, the output signals of the fourth through sixth flip-flops FF4-FF6 are transferred to the first through third analog circuits during a normal operation.
公开/授权文献
- US20090106610A1 SEMICONDUCTOR INTEGRATED CIRCUIT 公开/授权日:2009-04-23
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