Invention Grant
- Patent Title: Power mode control method and circuitry
- Patent Title (中): 电源模式控制方法和电路
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Application No.: US11967920Application Date: 2007-12-31
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Publication No.: US07877619B2Publication Date: 2011-01-25
- Inventor: Ramana Rachakonda , Blaise Fanning , Anil K Sabbavarapu , Belliappa M. Kuttanna , Rajesh Patel , Kenneth D. Shoemaker , Lance E. Hacking , Bruce L. Fleming , Ashish V. Choubal
- Applicant: Ramana Rachakonda , Blaise Fanning , Anil K Sabbavarapu , Belliappa M. Kuttanna , Rajesh Patel , Kenneth D. Shoemaker , Lance E. Hacking , Bruce L. Fleming , Ashish V. Choubal
- Agent Eric R. Nordstrom
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F1/00
Abstract:
In some embodiments, a power up (or power mode) interface is provided whereby a chip's power up signals are encoded into multiple states to provide more functions than the number of signals used to define the states.
Public/Granted literature
- US20090172429A1 POWER MODE CONTROL METHOD AND CIRCUITRY Public/Granted day:2009-07-02
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