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公开(公告)号:US07877619B2
公开(公告)日:2011-01-25
申请号:US11967920
申请日:2007-12-31
申请人: Ramana Rachakonda , Blaise Fanning , Anil K Sabbavarapu , Belliappa M. Kuttanna , Rajesh Patel , Kenneth D. Shoemaker , Lance E. Hacking , Bruce L. Fleming , Ashish V. Choubal
发明人: Ramana Rachakonda , Blaise Fanning , Anil K Sabbavarapu , Belliappa M. Kuttanna , Rajesh Patel , Kenneth D. Shoemaker , Lance E. Hacking , Bruce L. Fleming , Ashish V. Choubal
CPC分类号: G06F1/3203
摘要: In some embodiments, a power up (or power mode) interface is provided whereby a chip's power up signals are encoded into multiple states to provide more functions than the number of signals used to define the states.
摘要翻译: 在一些实施例中,提供上电(或功率模式)接口,由此芯片的上电信号被编码为多个状态以提供比用于定义状态的信号的数量更多的功能。