An architecture of the layout of the MTCMOS standard cell designed for low power consumption is supplemented so that the pick-up cells are included in the power line of the MTCMOS cell. Therefore, when the logic circuit is constructed using the library layout of the MTCMOS cell in which the related pick-up cells are not included, pick-up cells consisting of only the ends of the pick-up cells are not needed every 50 μm during the placement of the MTCMOS standard cell. The flexibility of the cell placement may thereby be improved. In addition, since additional space for the pick-up cells is not required, the size of the MTCMOS may be reduced, saving space on the semiconductor substrate.