Invention Grant
- Patent Title: Modifying layout of IC based on function of interconnect and related circuit and design structure
- Patent Title (中): 基于互连功能和相关电路以及设计结构修改IC布局
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Application No.: US12021333Application Date: 2008-01-29
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Publication No.: US07886240B2Publication Date: 2011-02-08
- Inventor: James W. Adkisson , Natalie B. Feilchenfeld , Jeffrey P. Gambino , Howard S. Landis , Benjamin T. Voegeli , Steven H. Voldman , Michael J. Zierak
- Applicant: James W. Adkisson , Natalie B. Feilchenfeld , Jeffrey P. Gambino , Howard S. Landis , Benjamin T. Voegeli , Steven H. Voldman , Michael J. Zierak
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Anthony J. Canale
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F7/38 ; H01L25/00 ; H03K19/00

Abstract:
Modifying a layout of an integrated circuit (IC) based on a function of an interconnect therein and a related circuit and design structure are disclosed. In one embodiment, a method includes identifying a function of an interconnect in the layout from data of the layout embodied in a computer readable medium; and modifying the layout to form another layout that accommodates the function of the interconnect. A design structure embodied in a machine readable medium used in a design process, according to one embodiment, may include a circuit including a high voltage interconnect positioned in a dielectric layer, the high voltage interconnect positioned such that no fill is above or below the high voltage interconnect.
Public/Granted literature
- US20090193378A1 MODIFYING LAYOUT OF IC BASED ON FUNCTION OF INTERCONNECT AND RELATED CIRCUIT AND DESIGN STRUCTURE Public/Granted day:2009-07-30
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