发明授权
- 专利标题: Fabrication process of a semiconductor device to form ultrafine patterns smaller than resolution limit of exposure apparatus
- 专利标题(中): 半导体器件的制造工艺形成比曝光装置的分辨率极限小的超细图案
-
申请号: US11945547申请日: 2007-11-27
-
公开(公告)号: US07968466B2公开(公告)日: 2011-06-28
- 发明人: Kenji Ishikawa , Hideharu Shido , Takeo Nagata , Teruo Kurahashi , Yasuyoshi Mishima
- 申请人: Kenji Ishikawa , Hideharu Shido , Takeo Nagata , Teruo Kurahashi , Yasuyoshi Mishima
- 申请人地址: JP Yokohama
- 专利权人: Fujitsu Semiconductor Limited
- 当前专利权人: Fujitsu Semiconductor Limited
- 当前专利权人地址: JP Yokohama
- 代理机构: Westerman, Hattori, Daniels & Adrian, LLP
- 优先权: JP2006-322463 20061129
- 主分类号: H01L21/311
- IPC分类号: H01L21/311
摘要:
A method for fabricating an electron device on a substrate includes the steps of forming a dummy film over the substrate such that the dummy film covers a device region of the substrate and an outer region of the substrate outside the device region, forming a dummy pattern by patterning the dummy film such that the dummy pattern has a first height in the device region and a second height smaller than the first height in the outer region, forming another film over the substrate such that the film covers the dummy pattern in the device region and in the outer region with a shape conformal to a cross-sectional shape of the dummy pattern, and applying an anisotropic etching process acting generally perpendicularly to the substrate such that a surface of the substrate is exposed in the device region and in the outer region.
公开/授权文献
- US20080124933A1 FABRICATION PROCESS OF A SEMICONDUCTOR DEVICE 公开/授权日:2008-05-29
信息查询
IPC分类: