Invention Grant
US07984354B2 Generating responses to patterns stimulating an electronic circuit with timing exception paths
有权
产生对具有定时异常路径刺激电子电路的模式的响应
- Patent Title: Generating responses to patterns stimulating an electronic circuit with timing exception paths
- Patent Title (中): 产生对具有定时异常路径刺激电子电路的模式的响应
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Application No.: US12494121Application Date: 2009-06-29
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Publication No.: US07984354B2Publication Date: 2011-07-19
- Inventor: Dhiraj Goswami , Kun-Han Tsai , Mark Kassab , Janusz Rajski
- Applicant: Dhiraj Goswami , Kun-Han Tsai , Mark Kassab , Janusz Rajski
- Applicant Address: US OR Wilsonville
- Assignee: Mentor Graphics Corporation
- Current Assignee: Mentor Graphics Corporation
- Current Assignee Address: US OR Wilsonville
- Agency: Klarquist Sparkman, LLP
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
Improved responses can be generated to scan patterns (e.g., test patterns) for an electronic circuit designs having timing exception paths by more accurately determining the unknown values that propagate to observation points in the circuit, where the response is captured. For instance, the responses are determined more accurately by analyzing the effect of sensitizing a timing exception path during each time frame associated with a scan pattern. Path sensitization can be determined based on observing whether values injected at starting points of the timing exception paths due to signal transitions and glitches propagate to their end points. The response can be updated by masking the affected end points and propagating unknown values further in the circuit to determine whether they are captured at observation points of the circuit. For instance, the methods and systems described herein may result in reduced unknowns, improved test coverage and test compression.
Public/Granted literature
- US20090327986A1 GENERATING RESPONSES TO PATTERNS STIMULATING AN ELECTRONIC CIRCUIT WITH TIMING EXCEPTION PATHS Public/Granted day:2009-12-31
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