发明授权
US08012830B2 ORO and ORPRO with bit line trench to suppress transport program disturb
有权
ORO和ORPRO与位线沟槽抑制传输程序干扰
- 专利标题: ORO and ORPRO with bit line trench to suppress transport program disturb
- 专利标题(中): ORO和ORPRO与位线沟槽抑制传输程序干扰
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申请号: US11835542申请日: 2007-08-08
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公开(公告)号: US08012830B2公开(公告)日: 2011-09-06
- 发明人: Ning Cheng , Kuo-Tung Chang , Hiro Kinoshita , Chih-Yuh Yang , Lei Xue , Chungho Lee , Minghao Shen , Angela Hui , Huaqiang Wu
- 申请人: Ning Cheng , Kuo-Tung Chang , Hiro Kinoshita , Chih-Yuh Yang , Lei Xue , Chungho Lee , Minghao Shen , Angela Hui , Huaqiang Wu
- 申请人地址: US CA Sunnyvale
- 专利权人: Spansion LLC
- 当前专利权人: Spansion LLC
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Turocy & Watson, LLP
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line openings containing a bit line dielectric between the memory cells. The memory cell contains a charge storage layer and a first poly gate. The bit line opening extends into the semiconductor substrate. By containing the bit line dielectric in the bit line openings that extend into the semiconductor substrate, the memory device can improve the electrical isolation between memory cells, thereby preventing and/or mitigating TPD.