A thin film transistor (“TFT”) array panel includes; a substrate including a display and peripheral area, a display area signal line and a display area TFT disposed in the display area, the display area TFT connected to the display area signal line, a plurality of peripheral area signal lines, a light blocking member disposed on the display area signal line, the display area TFT, and the peripheral area signal lines, a transparent connector connecting one of peripheral area signal lines and another one of the peripheral area signal lines through a contact hole passing through the light blocking member, a pixel electrode connected to the display area TFT, a spacer disposed on a layer above the light blocking member, and a light blocking assistance member composed of the same material as the spacer on the transparent connector, the light blocking assistance member covering at least the contact hole.