发明授权
- 专利标题: Semiconductor device including dummy gate part and method of fabricating the same
- 专利标题(中): 半导体器件包括伪栅极部分及其制造方法
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申请号: US12291211申请日: 2008-11-07
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公开(公告)号: US08053845B2公开(公告)日: 2011-11-08
- 发明人: Byoung-ho Kwon , Sang-youn Jo , Jin-sook Choi , Chang-ki Hong , Bo-un Yoon , Hong-soo Kim , Se-rah Yun
- 申请人: Byoung-ho Kwon , Sang-youn Jo , Jin-sook Choi , Chang-ki Hong , Bo-un Yoon , Hong-soo Kim , Se-rah Yun
- 申请人地址: KR
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR
- 代理机构: Onello & Mello, LLP
- 优先权: KR10-2007-0113719 20071108
- 主分类号: H01L21/70
- IPC分类号: H01L21/70
摘要:
In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.
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