发明授权
US08122317B1 Two-dimensional parity technique to facilitate error detection and correction in memory arrays 有权
二维奇偶校验技术,便于存储器阵列中的错误检测和校正

Two-dimensional parity technique to facilitate error detection and correction in memory arrays
摘要:
The present invention is directed to a two-dimensional parity technique for data to be stored in one or more memory arrays, each of which has various rows and columns of cells. A row of bits in a super bundle is referred to as a row bundle. A super bundle includes numerous rows of row bundles, and corresponding bits in each of the row bundles in the super bundle are aligned in columns. A row check bit is provided for each row bundle in each super bundle. Each row check bit provides a parity bit that is derived from the k bits of the corresponding row bundle. A column check bit is provided for each column in each super bundle. Each column check bit provides a parity bit that is derived from each of the bits in the corresponding column in the super bundle.
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