发明授权
US08133772B2 Deep trench capacitor for SOI CMOS devices for soft error immunity
有权
用于SOI CMOS器件的深沟槽电容器，用于软误差抗扰度
- 专利标题： Deep trench capacitor for SOI CMOS devices for soft error immunity
- 专利标题（中）： 用于SOI CMOS器件的深沟槽电容器，用于软误差抗扰度
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申请号： US13075271申请日： 2011-03-30
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公开(公告)号： US08133772B2公开(公告)日： 2012-03-13
- 发明人: John E. Barth, Jr. , Kerry Bernstein , Ethan H. Cannon , Francis R. White
- 申请人： John E. Barth, Jr. , Kerry Bernstein , Ethan H. Cannon , Francis R. White
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Cantor Colburn LLP
- 代理商 Vazken Alexanian
- 主分类号： H01L21/8242
- IPC分类号： H01L21/8242
摘要：
A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top of the active semiconductor layer, and source and drain regions and a body/channel region disposed within the active semiconductor layer, an insulator layer having a first and second side, the first side being adjacent to the active semiconductor layer, a substrate disposed adjacent to the second side of the insulator layer, a deep trench capacitor disposed under the body/channel region of the semiconductor device. The deep trench capacitor electrically connects with and contacts the body/channel region of the semiconductor device, and is located adjacent to the gate of the semiconductor device. The semiconductor structure increases a critical charge Qcrit, thereby reducing a soft error rate (SER) of the semiconductor device.
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