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发明授权
US08151010B2 Memory devices implementing clock mirroring scheme and related memory systems and clock mirroring methods 有权
实现时钟镜像方案和相关内存系统的内存设备和时钟镜像方法

Memory devices implementing clock mirroring scheme and related memory systems and clock mirroring methods
摘要：
A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode.
摘要（中）：

存储器件被配置为在第一和第二数据输入/输出模式下操作。 存储器件包括第一电极焊盘，第二电极焊盘，时钟信号线，第一切换单元和第二转换单元。 时钟信号线被配置为将时钟传送到存储器件内部的集成电路。 第一开关单元响应于针对第一数据输入/输出模式发生的控制信号而切换以电连接第一电极焊盘和时钟信号线。 第二开关单元响应于针对第二数据输入/输出模式发生的控制信号的反相信号而切换以电连接第二电极焊盘和时钟信号线。

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