Invention Grant
- Patent Title: Multi-layer SoC module structure
- Patent Title (中): 多层SoC模块结构
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Application No.: US12685723Application Date: 2010-01-12
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Publication No.: US08199510B2Publication Date: 2012-06-12
- Inventor: Chun-Ming Huang , Chien-Ming Wu , Chih-Chyau Yang , Shih-Lun Chen , Chin-Long Wey , Chi-Shi Chen , Chi-Sheng Lin
- Applicant: Chun-Ming Huang , Chien-Ming Wu , Chih-Chyau Yang , Shih-Lun Chen , Chin-Long Wey , Chi-Shi Chen , Chi-Sheng Lin
- Applicant Address: TW Hsinchu TW Hsinchu
- Assignee: National Chip Implementation Center,National Applied Research Laboratories
- Current Assignee: National Chip Implementation Center,National Applied Research Laboratories
- Current Assignee Address: TW Hsinchu TW Hsinchu
- Agency: Stites & Harbison, PLLC
- Agent Juan Carlos A. Marquez, Esq
- Priority: TW98136383A 20091028
- Main IPC: H05K7/20
- IPC: H05K7/20

Abstract:
A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.
Public/Granted literature
- US20110096506A1 MULTI-LAYER SOC MODULE STRUCTURE Public/Granted day:2011-04-28
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