Invention Grant
US08212357B2 Combination via and pad structure for improved solder bump electromigration characteristics 有权
组合通孔和焊盘结构,用于改善焊料凸块电迁移特性

Combination via and pad structure for improved solder bump electromigration characteristics
Abstract:
The invention generally relates to semiconductor devices, and more particularly to structures and methods for enhancing electromigration (EM) performance in solder bumps and related structures. A semiconductor structure includes a wire comprising first and second wire segments, a pad formed over the wire, and a ball limiting metallization (BLM) layer formed over the pad. The semiconductor structure also includes a solder bump formed over the BLM layer, a terminal via formed over the BLM layer, and at least one peripheral via formed between the second wire segment and the pad. The first and second wire segments are discrete wire segments.
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