发明授权
- 专利标题： Nonvolatile latch circuit and logic circuit using the same
- 专利标题（中）： 非易失性锁存电路和逻辑电路使用相同
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申请号： US12747951申请日： 2008-11-19
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公开(公告)号： US08243502B2公开(公告)日： 2012-08-14
- 发明人: Noboru Sakimura , Tadahiko Sugibayashi , Ryusuke Nebashi
- 申请人： Noboru Sakimura , Tadahiko Sugibayashi , Ryusuke Nebashi
- 申请人地址： JP Tokyo
- 专利权人： NEC Corporation
- 当前专利权人： NEC Corporation
- 当前专利权人地址： JP Tokyo
- 优先权： JP2007-324046 20071214
- 国际申请： PCT/JP2008/070986 WO 20081119
- 国际公布： WO2009/078242 WO 20090625
- 主分类号： G11C11/00
- IPC分类号： G11C11/00
摘要：
A nonvolatile latch circuit includes: a latch circuit; a first magnetoresistance element and a second magnetoresistance element; and a current supply portion. The latch circuit temporarily holds data. Each of the first magnetoresistance element and the second magnetoresistance element includes a first magnetic layer and a second magnetic layer that are stacked with an insulating film sandwiched therebetween. The current supply portion complementarily changes magnetization states of the first magnetoresistance element and the second magnetoresistance element based on a state of the latch circuit. The first magnetic layer of the first magnetoresistance element and the first magnetic layer of the second magnetoresistance element are series-connected to each other in. The latch circuit has a function that brings data corresponding to the magnetization states to data held by the latch circuit.