发明授权
- 专利标题: Frequency divider with synchronized outputs
- 专利标题(中): 分频器同步输出
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申请号: US12407700申请日: 2009-03-19
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公开(公告)号: US08265568B2公开(公告)日: 2012-09-11
- 发明人: Dongjiang Qiao , Frederic Bossu
- 申请人: Dongjiang Qiao , Frederic Bossu
- 申请人地址: US CA San Diego
- 专利权人: Qualcomm Incorporated
- 当前专利权人: Qualcomm Incorporated
- 当前专利权人地址: US CA San Diego
- 代理商 S. Hossain Beladi
- 主分类号: H03K25/00
- IPC分类号: H03K25/00
摘要:
A synchronized frequency divider that can divide a clock signal in frequency and provide differential output signals having good signal characteristics is described. In one exemplary design, the synchronized frequency divider includes a single-ended frequency divider and a synchronization circuit. The single-ended frequency divider divides the clock signal in frequency and provides first and second single-ended signals, which may be complementary signals having timing skew. The synchronization circuit resamples the first and second single-ended signals based on the clock signal and provides differential output signals having reduced timing skew. In one exemplary design, the synchronization circuit includes first and second switches and first and second inverters. The first switch and the first inverter form a first sample-and-hold circuit or a first latch that resamples the first single-ended signal. The second switch and the second inverter form a second sample-and-hold circuit or a second latch that resamples the second single-ended signal.
公开/授权文献
- US20100240323A1 FREQUENCY DIVIDER WITH SYNCHRONIZED OUTPUTS 公开/授权日:2010-09-23
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