Invention Grant
US08319265B2 Semiconductor device with improved common source arrangement for adjacent non-volatile memory cells
有权
具有改进的用于相邻非易失性存储器单元的共同源排列的半导体器件
- Patent Title: Semiconductor device with improved common source arrangement for adjacent non-volatile memory cells
- Patent Title (中): 具有改进的用于相邻非易失性存储器单元的共同源排列的半导体器件
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Application No.: US12580289Application Date: 2009-10-16
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Publication No.: US08319265B2Publication Date: 2012-11-27
- Inventor: Tsutomu Okazaki , Daisuke Okada , Kyoya Nitta , Toshihiro Tanaka , Akira Kato , Toshikazu Matsui , Yasushi Ishii , Digh Hisamoto , Kan Yasui
- Applicant: Tsutomu Okazaki , Daisuke Okada , Kyoya Nitta , Toshihiro Tanaka , Akira Kato , Toshikazu Matsui , Yasushi Ishii , Digh Hisamoto , Kan Yasui
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2004-231869 20040809
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.
Public/Granted literature
- US20100038700A1 Semiconductor Device Public/Granted day:2010-02-18
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