Invention Grant
- Patent Title: Delay circuit and method for delaying signal
- Patent Title (中): 延迟电路和延迟信号的方法
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Application No.: US12970623Application Date: 2010-12-16
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Publication No.: US08344783B2Publication Date: 2013-01-01
- Inventor: Jae Bum Ko , Jong Chern Lee , Sang Jin Byeon
- Applicant: Jae Bum Ko , Jong Chern Lee , Sang Jin Byeon
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2010-0017287 20100225
- Main IPC: H03H11/26
- IPC: H03H11/26
Abstract:
A delay circuit includes: a delay unit configured to receive a clock signal, delay an input signal sequentially by a predetermined time interval, and output a plurality of first delayed signals; and an option unit configured to select one of the plurality of first delayed signals based on one or more select signals, and output a second delayed signal.
Public/Granted literature
- US20110204950A1 DELAY CIRCUIT AND METHOD FOR DELAYING SIGNAL Public/Granted day:2011-08-25
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