Invention Grant
- Patent Title: Method for stacking semiconductor dies
- Patent Title (中): 半导体晶片堆叠方法
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Application No.: US13168351Application Date: 2011-06-24
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Publication No.: US08362593B2Publication Date: 2013-01-29
- Inventor: Ku-Feng Yang , Weng-Jin Wu , Wen-Chih Chiou , Chen-Hua Yu
- Applicant: Ku-Feng Yang , Weng-Jin Wu , Wen-Chih Chiou , Chen-Hua Yu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
A system and method for stacking semiconductor dies is disclosed. A preferred embodiment comprises forming through-silicon vias through the wafer, protecting a rim edge of the wafer, and then removing the unprotected portions so that the rim edge has a greater thickness than the thinned wafer. This thickness helps the fragile wafer survive further transport and process steps. The rim edge is then preferably removed during singulation of the individual dies from the wafer.
Public/Granted literature
- US20110248409A1 Method for Stacking Semiconductor Dies Public/Granted day:2011-10-13
Information query
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