发明授权
US08420446B2 Circuit member, manufacturing method of the circuit member, and semiconductor device including the circuit member
有权
电路部件，电路部件的制造方法以及包括电路部件的半导体装置
- 专利标题： Circuit member, manufacturing method of the circuit member, and semiconductor device including the circuit member
- 专利标题（中）： 电路部件，电路部件的制造方法以及包括电路部件的半导体装置
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申请号： US13012268申请日： 2011-01-24
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公开(公告)号： US08420446B2公开(公告)日： 2013-04-16
- 发明人: Yo Shimazaki , Hiroyuki Saito , Masachika Masuda , Kenji Matsumura , Masaru Fukuchi , Takao Ikezawa
- 申请人： Yo Shimazaki , Hiroyuki Saito , Masachika Masuda , Kenji Matsumura , Masaru Fukuchi , Takao Ikezawa
- 申请人地址： JP Shinjuku-Ku
- 专利权人： Dai Nippon Printing Co., Ltd.
- 当前专利权人： Dai Nippon Printing Co., Ltd.
- 当前专利权人地址： JP Shinjuku-Ku
- 代理机构： Burr & Brown
- 优先权： JP2005-341399 20051128
- 主分类号： H01L21/58
- IPC分类号： H01L21/58
摘要：
A circuit member includes a lead frame material having a die pad, a lead part to be electrically connected with a semiconductor chip, and an outer frame configured to support the die pad and the lead part. The lead frame material includes a resin sealing region. Roughened faces, each having an average roughness Ra of 0.3 μm or greater, are formed on a surface in the resin sealing region of the lead frame material. The surface of the lead frame material except for the resin sealing region is a flat and smooth face. A two-layer plated layer formed by laminating a Ni plated layer and a Pd plated layer in this order or a three-layer plated layer formed by laminating the Ni plated layer, the Pd plated layer and an Au plated layer in this order is formed on the whole surface of the lead frame material.
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