发明授权
- 专利标题： Microelectronic package containing silicon connecting region for high density interconnects, and method of manufacturing same
- 专利标题（中）： 含有用于高密度互连的硅连接区域的微电子封装及其制造方法
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申请号： US13161538申请日： 2011-06-16
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公开(公告)号： US08441809B2公开(公告)日： 2013-05-14
- 发明人: Ravi Mahajan , Sandeep Sane
- 申请人： Ravi Mahajan , Sandeep Sane
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理商 Kenneth A. Nelson
- 主分类号： H05K7/02
- IPC分类号： H05K7/02 ; H01L21/78 ; H01L21/50
摘要：
A microelectronic package comprises a substrate (110), a silicon patch (120) embedded in the substrate, a first interconnect structure (131) at a first location of the silicon patch and a second interconnect structure (132) at a second location of the silicon patch, and an electrically conductive line (150) in the silicon patch connecting the first interconnect structure and the second interconnect structure to each other.
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