Invention Grant
- Patent Title: Pulse sequence for plating on thin seed layers
- Patent Title (中): 用于在薄种子层上电镀的脉冲序列
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Application No.: US12786329Application Date: 2010-05-24
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Publication No.: US08500983B2Publication Date: 2013-08-06
- Inventor: Thomas A. Ponnuswamy , Bryan Pennington , Clifford Berry , Bryan L. Buckalew , Steven T. Mayer
- Applicant: Thomas A. Ponnuswamy , Bryan Pennington , Clifford Berry , Bryan L. Buckalew , Steven T. Mayer
- Applicant Address: US CA Fremont
- Assignee: Novellus Systems, Inc.
- Current Assignee: Novellus Systems, Inc.
- Current Assignee Address: US CA Fremont
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: C25D5/18
- IPC: C25D5/18 ; C25D7/12

Abstract:
A plating protocol is employed to control plating of metal onto a wafer comprising a conductive seed layer. Initially, the protocol employs cathodic protection as the wafer is immersed in the plating solution. In certain embodiments, the current density of the wafer is constant during immersion. In a specific example, potentiostatic control is employed to produce a current density in the range of about 1.5 to 20 mA/cm2. The immersion step is followed by a high current pulse step. During bottom up fill inside the features of the wafer, a constant current or a current with a micropulse may be used. This protocol may protect the seed from corrosion while enhancing nucleation during the initial stages of plating.
Public/Granted literature
- US20100300888A1 PULSE SEQUENCE FOR PLATING ON THIN SEED LAYERS Public/Granted day:2010-12-02
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