Invention Grant
US08546943B2 Ball grid array substrate with insulating layer and semiconductor chip package
失效
球栅阵列衬底采用绝缘层和半导体芯片封装
- Patent Title: Ball grid array substrate with insulating layer and semiconductor chip package
- Patent Title (中): 球栅阵列衬底采用绝缘层和半导体芯片封装
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Application No.: US12923037Application Date: 2010-08-30
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Publication No.: US08546943B2Publication Date: 2013-10-01
- Inventor: Jung Hyun Park , Nam Keun Oh , Sang Duck Kim , Jong Gyu Choi , Young Ji Kim , Ji Eun Kim , Myung Sam Kang
- Applicant: Jung Hyun Park , Nam Keun Oh , Sang Duck Kim , Jong Gyu Choi , Young Ji Kim , Ji Eun Kim , Myung Sam Kang
- Applicant Address: KR Suwon
- Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee Address: KR Suwon
- Priority: KR10-2009-0102733 20091028
- Main IPC: H01L23/13
- IPC: H01L23/13 ; H01L23/498

Abstract:
Provided is a ball grid array substrate, a semiconductor chip package, and a method of manufacturing the same. The ball grid array substrate includes an insulating layer having a first surface providing a mounting region for a semiconductor chip, a second surface opposing the first surface, and an opening connecting the second surface with the mounting region of the semiconductor chip, and a circuit pattern buried in the second surface. Since the ball grid array substrate is manufactured by a method of stacking two insulating layers, existing devices can be used, and the ball grid array substrate can be manufactured as an ultra thin plate. In addition, since the circuit pattern is buried in the insulating layer, a high-density circuit pattern can be formed.
Public/Granted literature
- US20110095425A1 Ball grid array substrate, semiconductor chip package and method of manufacturing the same Public/Granted day:2011-04-28
Information query
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