Invention Grant
- Patent Title: Multi-die stacking using bumps with different sizes
- Patent Title (中): 使用不同尺寸的凸块进行多芯片堆叠
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Application No.: US12840949Application Date: 2010-07-21
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Publication No.: US08581418B2Publication Date: 2013-11-12
- Inventor: Weng-Jin Wu , Ying-Ching Shih , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
- Applicant: Weng-Jin Wu , Ying-Ching Shih , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A device includes a first die having a first side and a second side opposite to first side, the first side includes a first region and a second region, and a first metal bump of a first horizontal size formed on the first region of the first side of the first die. A second die is bonded to the first side of the first die through the first metal bump. A dielectric layer is formed over the first side of the first die and includes a first portion directly over the second die, a second portion encircling the second die, and an opening exposing the second region of the first side of the first die. A second metal bump of a second horizontal size is formed on the second region of the first side of the first die and extending into the opening of the dielectric layer. The second horizontal size is greater than the first horizontal size. An electrical component is bonded to the first side of the first die through the second metal bump.
Public/Granted literature
- US20120018876A1 Multi-Die Stacking Using Bumps with Different Sizes Public/Granted day:2012-01-26
Information query
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