发明授权
US08592994B2 Semiconductor package, core layer material, buildup layer material, and sealing resin composition
有权
半导体封装,芯层材料,堆积层材料和密封树脂组合物
- 专利标题: Semiconductor package, core layer material, buildup layer material, and sealing resin composition
- 专利标题(中): 半导体封装,芯层材料,堆积层材料和密封树脂组合物
-
申请号: US12517551申请日: 2007-12-05
-
公开(公告)号: US08592994B2公开(公告)日: 2013-11-26
- 发明人: Kenya Tachibana , Masahiro Wada , Hitoshi Kawaguchi , Kensuke Nakamura
- 申请人: Kenya Tachibana , Masahiro Wada , Hitoshi Kawaguchi , Kensuke Nakamura
- 申请人地址: JP Tokyo
- 专利权人: Sumitomo Bakelite Co., Ltd.
- 当前专利权人: Sumitomo Bakelite Co., Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Ditthavong Mori & Steiner, P.C.
- 优先权: JP2006-328364 20061205
- 国际申请: PCT/JP2007/073896 WO 20071205
- 国际公布: WO2008/069343 WO 20080612
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
A flip-chip semiconductor package includes a circuit board having a core layer and at least one buildup layer, a semiconductor device connected to the circuit board through a metal bump, and a cured member that is made of a sealing resin composition and enclosed between the semiconductor device and the circuit board. The coefficient of linear expansion at 25 to 75° C. of the cured member is 15 to 35 ppm/° C., the glass transition temperature of at least one buildup layer is 170° C. or more, and the coefficient of linear expansion of at 25 to 75° C. of the at least one buildup layer in the planar direction is 25 ppm or less. A highly reliable flip-chip semiconductor package, buildup layer material, core layer material, and sealing resin composition can be provided by preventing cracks and inhibiting delamination.