Invention Grant
- Patent Title: Systems and methods of automatically detecting failure patterns for semiconductor wafer fabrication processes
- Patent Title (中): 自动检测半导体晶片制造工艺的故障模式的系统和方法
-
Application No.: US13455186Application Date: 2012-04-25
-
Publication No.: US08627251B2Publication Date: 2014-01-07
- Inventor: Jui-Long Chen , Hui-Yun Chao , Yen-Di Tsen , Jong-I Mou
- Applicant: Jui-Long Chen , Hui-Yun Chao , Yen-Di Tsen , Jong-I Mou
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A system and method of automatically detecting failure patterns for a semiconductor wafer process is provided. The method includes receiving a test data set collected from testing a plurality of semiconductor wafers, forming a respective wafer map for each of the wafers, determining whether each respective wafer map comprises one or more respective objects, selecting the wafer maps that are determined to comprise one or more respective objects, selecting one or more object indices for selecting a respective object in each respective selected wafer map, determining a plurality of object index values in each respective selected wafer map, selecting an object in each respective selected wafer map, determining a respective feature in each of the respective selected wafer, classifying a respective pattern for each of the respective selected wafer maps and using the respective wafer fingerprints to adjust one or more parameters of the semiconductor fabrication process.
Public/Granted literature
Information query