公开(公告)号：US08627251B2

公开(公告)日：2014-01-07

申请号：US13455186

申请日：2012-04-25

申请人： Jui-Long Chen ,  Hui-Yun Chao ,  Yen-Di Tsen ,  Jong-I Mou

发明人： Jui-Long Chen ,  Hui-Yun Chao ,  Yen-Di Tsen ,  Jong-I Mou

IPC分类号： G06F17/50

CPC分类号： H01L22/20 ,  H01L22/10 ,  H01L22/12 ,  H01L22/14 ,  H01L2924/0002 ,  Y10T29/41 ,  H01L2924/00

摘要： A system and method of automatically detecting failure patterns for a semiconductor wafer process is provided. The method includes receiving a test data set collected from testing a plurality of semiconductor wafers, forming a respective wafer map for each of the wafers, determining whether each respective wafer map comprises one or more respective objects, selecting the wafer maps that are determined to comprise one or more respective objects, selecting one or more object indices for selecting a respective object in each respective selected wafer map, determining a plurality of object index values in each respective selected wafer map, selecting an object in each respective selected wafer map, determining a respective feature in each of the respective selected wafer, classifying a respective pattern for each of the respective selected wafer maps and using the respective wafer fingerprints to adjust one or more parameters of the semiconductor fabrication process.

摘要翻译： 提供了一种自动检测半导体晶片工艺的故障模式的系统和方法。 该方法包括接收从测试多个半导体晶片收集的测试数据集，为每个晶片形成相应的晶片图，确定每个相应的晶片图是否包括一个或多个相应的对象，选择被确定为包括的晶片图 一个或多个相应的对象，选择一个或多个对象索引，用于在每个相应的选定的晶片图中选择相应的对象，确定每个相应选择的晶片图中的多个对象索引值，在每个相应选定的晶片图中选择一个对象， 各个所选晶片中的每一个的相应特征，对各个所选晶片图中的每一个分类各自的图案，并使用相应的晶片指纹来调整半导体制造工艺的一个或多个参数。

公开(公告)号：US08406912B2

公开(公告)日：2013-03-26

申请号：US12823351

申请日：2010-06-25

申请人： Jui-Long Chen ,  Chia-Tong Ho ,  Po-Feng Tsai ,  Hui-Yun Chao ,  Jong-I Mou

发明人： Jui-Long Chen ,  Chia-Tong Ho ,  Po-Feng Tsai ,  Hui-Yun Chao ,  Jong-I Mou

IPC分类号： G06F19/00

CPC分类号： G05B19/41875 ,  G05B2219/32191 ,  G05B2219/35082 ,  Y02P90/22 ,  Y02P90/265

摘要： System and method for data mining and feature tracking for fab-wide prediction and control are described. One embodiment is a system comprising a database for storing raw wafer manufacturing data; a data mining module for processing the raw wafer manufacturing data to select the best data therefrom in accordance with at least one of a plurality of knowledge-, statistic-, and effect-based processes; and a feature tracking module associated with the data mining module and comprising a self-learning model wherein a sensitivity of the self-learning model is dynamically tuned to meet real-time production circumstances, the feature tracking module receiving the selected data from the data mining module and generating prediction and control data therefrom; wherein the prediction and control data are used to control future processes in the wafer fabrication facility.

摘要翻译： 描述了用于晶圆厂预测和控制的数据挖掘和特征跟踪的系统和方法。 一个实施例是包括用于存储原始晶片制造数据的数据库的系统; 数据挖掘模块，用于根据多个基于知识，统计和效果的过程中的至少一个来处理原始晶片制造数据以从其中选择最佳数据; 以及与所述数据挖掘模块相关联并且包括自学习模型的特征跟踪模块，其中自学习模型的灵敏度被动态调整以满足实时生产环境，所述特征跟踪模块从所述数据挖掘接收所选择的数据 模块并从其生成预测和控制数据; 其中预测和控制数据用于控制晶片制造设备中的未来工艺。

公开(公告)号：US20110320026A1

公开(公告)日：2011-12-29

申请号：US12823351

申请日：2010-06-25

申请人： Jui-Long Chen ,  Chia-Tong Ho ,  Po-Feng Tsai ,  Hui-Yun Chao ,  Jong-I Mou

发明人： Jui-Long Chen ,  Chia-Tong Ho ,  Po-Feng Tsai ,  Hui-Yun Chao ,  Jong-I Mou

IPC分类号： G06F19/00

CPC分类号： G05B19/41875 ,  G05B2219/32191 ,  G05B2219/35082 ,  Y02P90/22 ,  Y02P90/265

摘要： System and method for data mining and feature tracking for fab-wide prediction and control are described. One embodiment is a system comprising a database for storing raw wafer manufacturing data; a data mining module for processing the raw wafer manufacturing data to select the best data therefrom in accordance with at least one of a plurality of knowledge-, statistic-, and effect-based processes; and a feature tracking module associated with the data mining module and comprising a self-learning model wherein a sensitivity of the self-learning model is dynamically tuned to meet real-time production circumstances, the feature tracking module receiving the selected data from the data mining module and generating prediction and control data therefrom; wherein the prediction and control data are used to control future processes in the wafer fabrication facility.

摘要翻译： 描述了用于晶圆厂预测和控制的数据挖掘和特征跟踪的系统和方法。 一个实施例是包括用于存储原始晶片制造数据的数据库的系统; 数据挖掘模块，用于根据多个基于知识，统计和效果的过程中的至少一个来处理原始晶片制造数据以从其中选择最佳数据; 以及与数据挖掘模块相关联并包括自学习模型的特征跟踪模块，其中自学习模型的灵敏度被动态调整以满足实时生产环境，特征跟踪模块从数据挖掘接收所选数据 模块并从其生成预测和控制数据; 其中预测和控制数据用于控制晶片制造设备中的未来工艺。

公开(公告)号：US09000798B2

公开(公告)日：2015-04-07

申请号：US13495421

申请日：2012-06-13

申请人： Jui-Long Chen ,  Chien-Chih Liao ,  Tseng Chin Lo ,  Hui-Yun Chao ,  Ta-Yung Lee ,  Jong-I Mou ,  Chin-Hsiang Lin

发明人： Jui-Long Chen ,  Chien-Chih Liao ,  Tseng Chin Lo ,  Hui-Yun Chao ,  Ta-Yung Lee ,  Jong-I Mou ,  Chin-Hsiang Lin

IPC分类号： G01R31/02 ,  G01R31/28 ,  H01L23/544

CPC分类号： G01R1/07364 ,  G01R1/06705 ,  G01R31/2887 ,  G01R31/2891 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/00 ,  H01L2924/0002

摘要： A system and method for aligning a probe, such as a wafer-level test probe, with wafer contacts is disclosed. An exemplary method includes receiving a wafer containing a plurality of alignment contacts and a probe card containing a plurality of probe points at a wafer test system. A historical offset correction is received. Based on the historical offset correct, an orientation value for the probe card relative to the wafer is determined. The probe card is aligned to the wafer using the orientation value in an attempt to bring a first probe point into contact with a first alignment contact. The connectivity of the first probe point and the first alignment contact is evaluated. An electrical test of the wafer is performed utilizing the aligned probe card, and the historical offset correction is updated based on the orientation value.

摘要翻译： 公开了一种用于将诸如晶片级测试探针的探针与晶片接触件对准的系统和方法。 一种示例性方法包括在晶片测试系统处接收包含多个对准触点的晶片和包含多个探针点的探针卡。 接收到历史偏移校正。 基于历史偏移校正，确定探针卡相对于晶片的取向值。 使用取向值将探针卡与晶片对准，以试图使第一探针点与第一对准触点接触。 评估第一探针点和第一对准接触点的连接性。 使用对准的探针卡进行晶片的电气测试，并且基于取向值更新历史偏移校正。

公开(公告)号：US20130335109A1

公开(公告)日：2013-12-19

申请号：US13495421

申请日：2012-06-13

申请人： Jui-Long Chen ,  Chien-Chih Liao ,  Tseng Chin Lo ,  Hui-Yun Chao ,  Ta-Yung Lee ,  Jong-I Mou ,  Chin-Hsiang Lin

发明人： Jui-Long Chen ,  Chien-Chih Liao ,  Tseng Chin Lo ,  Hui-Yun Chao ,  Ta-Yung Lee ,  Jong-I Mou ,  Chin-Hsiang Lin

IPC分类号： G01R31/26 ,  H01L29/06

CPC分类号： G01R1/07364 ,  G01R1/06705 ,  G01R31/2887 ,  G01R31/2891 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/00 ,  H01L2924/0002

摘要： A system and method for aligning a probe, such as a wafer-level test probe, with wafer contacts is disclosed. An exemplary method includes receiving a wafer containing a plurality of alignment contacts and a probe card containing a plurality of probe points at a wafer test system. A historical offset correction is received. Based on the historical offset correct, an orientation value for the probe card relative to the wafer is determined. The probe card is aligned to the wafer using the orientation value in an attempt to bring a first probe point into contact with a first alignment contact. The connectivity of the first probe point and the first alignment contact is evaluated. An electrical test of the wafer is performed utilizing the aligned probe card, and the historical offset correction is updated based on the orientation value.

摘要翻译： 公开了一种用于将诸如晶片级测试探针之类的探针与晶片接点对准的系统和方法。 一种示例性方法包括在晶片测试系统处接收包含多个对准触点的晶片和包含多个探针点的探针卡。 接收到历史偏移校正。 基于历史偏移校正，确定探针卡相对于晶片的取向值。 使用取向值将探针卡与晶片对准，以试图使第一探针点与第一对准触点接触。 评估第一探针点和第一对准接触点的连接性。 使用对准的探针卡进行晶片的电气测试，并且基于取向值更新历史偏移校正。

公开(公告)号：US08391999B2

公开(公告)日：2013-03-05

申请号：US12797392

申请日：2010-06-09

申请人： Jui-Long Chen ,  Hui-Yun Chao ,  Chia-Tong Ho

发明人： Jui-Long Chen ,  Hui-Yun Chao ,  Chia-Tong Ho

IPC分类号： D06F19/00

CPC分类号： G06F17/5068 ,  G05B19/41865 ,  G05B2219/32096 ,  Y02P90/20

摘要： A system and method for manufacturing semiconductor devices is disclosed. An embodiment comprises using desired device parameters to choose an initial manufacturing recipe. Once chosen, the initial manufacturing recipe may be modified by determining and applying an offset adjustment based on previous manufacturing to tune the recipes for the particular equipment to be utilized in the manufacturing process.

公开(公告)号：US20110010215A1

公开(公告)日：2011-01-13

申请号：US12499345

申请日：2009-07-08

申请人： Chun-Hsien Lin ,  Andy Tsen ,  Jui-Long Chen ,  Sunny Wu ,  Jong-I Mou ,  Chia-Hung Huang

发明人： Chun-Hsien Lin ,  Andy Tsen ,  Jui-Long Chen ,  Sunny Wu ,  Jong-I Mou ,  Chia-Hung Huang

IPC分类号： G06Q10/00 ,  G06F17/18

CPC分类号： G06Q10/06 ,  G06Q30/0202

摘要： A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.

摘要翻译： 公开了一种用于在集成电路器件制造工艺的早期阶段提供容量比预测的方法。 该方法包括从一个或多个处理的晶片批次收集历史数据; 从一个或多个偏斜晶片批量收集测量数据; 从收集的历史数据和收集的测量数据生成估计的基线分布; 基于一个或多个指定参数和所生成的估计基线分布产生估计的性能分布; 通过对所生成的估计性能分布应用仓定义和产量退化因子估计来确定仓比预测; 根据仓比预测确定一个或多个生产目标; 以及基于所述一个或多个确定的生产目标来处理一个或多个晶圆。

公开(公告)号：US08082055B2

公开(公告)日：2011-12-20

申请号：US12499345

申请日：2009-07-08

申请人： Chun-Hsien Lin ,  Andy Tsen ,  Jui-Long Chen ,  Sunny Wu ,  Jong-I Mou ,  Chia-Hung Huang

发明人： Chun-Hsien Lin ,  Andy Tsen ,  Jui-Long Chen ,  Sunny Wu ,  Jong-I Mou ,  Chia-Hung Huang

IPC分类号： G06F19/00

CPC分类号： G06Q10/06 ,  G06Q30/0202

摘要： A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.

摘要翻译： 公开了一种用于在集成电路器件制造工艺的早期阶段提供容量比预测的方法。 该方法包括从一个或多个处理的晶片批次收集历史数据; 从一个或多个偏斜晶片批量收集测量数据; 从收集的历史数据和收集的测量数据生成估计的基线分布; 基于一个或多个指定参数和所生成的估计基线分布产生估计的性能分布; 通过对所生成的估计性能分布应用仓定义和产量退化因子估计来确定仓比预测; 根据仓比预测确定一个或多个生产目标; 以及基于所述一个或多个确定的生产目标来处理一个或多个晶圆。

公开(公告)号：US20110307088A1

公开(公告)日：2011-12-15

申请号：US12797392

申请日：2010-06-09

申请人： Jui-Long Chen ,  Hui-Yun Chao ,  Chia-Tong Ho

发明人： Jui-Long Chen ,  Hui-Yun Chao ,  Chia-Tong Ho

IPC分类号： G06F19/00

CPC分类号： G06F17/5068 ,  G05B19/41865 ,  G05B2219/32096 ,  Y02P90/20

摘要： A system and method for manufacturing semiconductor devices is disclosed. An embodiment comprises using desired device parameters to choose an initial manufacturing recipe. Once chosen, the initial manufacturing recipe may be modified by determining and applying an offset adjustment based on previous manufacturing to tune the recipes for the particular equipment to be utilized in the manufacturing process.

摘要翻译： 公开了一种用于制造半导体器件的系统和方法。 实施例包括使用期望的设备参数来选择初始制造配方。 一旦选择，可以通过基于先前的制造确定和应用偏移调整来修改初始制造配方，以调整要在制造过程中使用的特定设备的配方。