发明授权
- 专利标题： Semiconductor device and method of manufacturing the same
- 专利标题（中）： 半导体装置及其制造方法
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申请号： US13144744申请日： 2009-10-23
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公开(公告)号： US08633530B2公开(公告)日： 2014-01-21
- 发明人: Kota Funayama , Hiraku Chakihara , Yasushi Ishii
- 申请人： Kota Funayama , Hiraku Chakihara , Yasushi Ishii
- 申请人地址： JP Kawasaki-shi
- 专利权人： Renesas Electronics Corporation
- 当前专利权人： Renesas Electronics Corporation
- 当前专利权人地址： JP Kawasaki-shi
- 代理机构： Miles & Stockbridge P.C.
- 优先权： JPPCT/JP2009/050435 20090115
- 国际申请： PCT/JP2009/068275 WO 20091023
- 国际公布： WO2010/082389 WO 20100722
- 主分类号： H01L21/28
- IPC分类号： H01L21/28 ; H01L29/792 ; H01L21/336 ; H01L27/06
摘要：
In a power feeding region of a memory cell (MC) in which a sidewall-shaped memory gate electrode (MG) of a memory nMIS (Qnm) is provided by self alignment on a side surface of a selection gate electrode (CG) of a selection nMIS (Qnc) via an insulating film, a plug (PM) which supplies a voltage to the memory gate electrode (MG) is embedded in a contact hole (CM) formed in an interlayer insulating film (9) formed on the memory gate electrode (MG) and is electrically connected to the memory gate electrode (MG). Since a cap insulating film (CAP) is formed on an upper surface of the selection gate electrode (CG), the electrical conduction between the plug (PM) and the selection gate electrode (CG) can be prevented.
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