A package substrate includes an insulating substrate, a functional pattern and a main dummy pattern. A semiconductor chip is arranged on the insulating substrate. The functional pattern is formed on the insulating substrate. The functional pattern is electrically connected to the semiconductor chip. The main dummy pattern is formed on a portion of the insulating substrate at least of to the outside of and/or adjacent the functional pattern in a path of stress generated by a difference between thermal expansion coefficient of the insulating substrate and the semiconductor chip, so as to divert the stress away from the functional pattern. Thus, the stress is not concentrated on the functional pattern. As a result, damage to the functional bump caused by the stress is prevented.