Invention Grant
- Patent Title: High die strength semiconductor wafer processing method and system
- Patent Title (中): 高芯片半导体晶圆加工方法及系统
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Application No.: US13721674Application Date: 2012-12-20
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Publication No.: US08809166B2Publication Date: 2014-08-19
- Inventor: Hartmut Buenning , Sascha Moeller , Martin Lapke , Guido Albermann , Thomas Rohleder
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/78
Abstract:
Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.
Public/Granted literature
- US20140179083A1 HIGH DIE STRENGTH SEMICONDUCTOR WAFER PROCESSING METHOD AND SYSTEM Public/Granted day:2014-06-26
Information query
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