- 专利标题： Pillar design for conductive bump
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申请号： US13189127申请日： 2011-07-22
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公开(公告)号： US08816498B2公开(公告)日： 2014-08-26
- 发明人: Cheng-Chieh Hsieh , Cheng-Lin Huang , Po-Hao Tsai , Shang-Yun Hou , Jing-Cheng Lin , Shin-Puu Jeng
- 申请人： Cheng-Chieh Hsieh , Cheng-Lin Huang , Po-Hao Tsai , Shang-Yun Hou , Jing-Cheng Lin , Shin-Puu Jeng
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L23/485
- IPC分类号： H01L23/485 ; H01L21/768
摘要：
A system and method for conductive pillars is provided. An embodiment comprises a conductive pillar having trenches located around its outer edge. The trenches are used to channel conductive material such as solder when a conductive bump is formed onto the conductive pillar. The conductive pillar may then be electrically connected to another contact through the conductive material.
公开/授权文献
- US20130020698A1 Pillar Design for Conductive Bump 公开/授权日：2013-01-24
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