Invention Grant
US08822332B2 Method for forming gate, source, and drain contacts on a MOS transistor
有权
在MOS晶体管上形成栅极，源极和漏极接触的方法
- Patent Title: Method for forming gate, source, and drain contacts on a MOS transistor
- Patent Title (中): 在MOS晶体管上形成栅极，源极和漏极接触的方法
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Application No.: US13871884Application Date: 2013-04-26
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Publication No.: US08822332B2Publication Date: 2014-09-02
- Inventor: Heimanu Niebojewski , Yves Morand , Cyrille Le Royer , Fabrice Nemouchi
- Applicant: STMicroelectronics S.A. , Commissariat à l'Énergie Atomique et aux Énergies Alternatives
- Applicant Address: FR Montrouge FR Paris
- Assignee: STMicroelectronics S.A.,Commissariat à l'Énergie Atomique et aux Énergies Alternatives
- Current Assignee: STMicroelectronics S.A.,Commissariat à l'Énergie Atomique et aux Énergies Alternatives
- Current Assignee Address: FR Montrouge FR Paris
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: FR1254145 20120504
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/28 ; H01L29/66 ; H01L21/768
Abstract:
A method for forming gate, source, and drain contacts on a MOS transistor having an insulated gate including polysilicon covered with a metal gate silicide, this gate being surrounded with at least one spacer made of a first insulating material, the method including the steps of a) covering the structure with a second insulating material and leveling the second insulating material to reach the gate silicide; b) oxidizing the gate so that the gate silicide buries and covers the a silicon oxide; c) selectively removing the second insulating material; and d) covering the structure with a first conductive material and leveling the first conductive material all the way to a lower level at the top of the spacer.
Public/Granted literature
- US20130295734A1 METHOD FOR FORMING GATE, SOURCE, AND DRAIN CONTACTS ON A MOS TRANSISTOR Public/Granted day:2013-11-07
Information query
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