The invention discloses a manufacture method and structure of a power transistor, comprising a lower electrode, a substrate, a drift region, two first conductive regions, two second conductive regions, two gate units, an isolation structure and an upper electrode. The two second conductive region are between the two first conductive regions and the drift region; the two gate units are on the two second conductive regions; the isolation structure covers the two gate units; the upper electrode covers the isolation structure and connects to the two first conductive regions and the two second conductive regions electrically. When the substrate is of the first conductive type, the structure can be used as MOSFET. When the substrate is of the second conductive type, the structure can be used as IGBT. This structure has a small gate electrode area, which leads to less Qg, Qgd and Rdson and improves device performance.