Invention Grant
- Patent Title: Integrated circuitry, methods of forming memory cells, and methods of patterning platinum-containing material
- Patent Title (中): 集成电路,形成记忆单元的方法,以及构图含铂材料的方法
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Application No.: US14137477Application Date: 2013-12-20
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Publication No.: US08835891B2Publication Date: 2014-09-16
- Inventor: Andrey V. Zagrebelny , Chet E. Carter
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L45/00 ; H01L27/24 ; H01L21/321 ; H01L21/768 ; H01L23/532

Abstract:
Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.
Public/Granted literature
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