Invention Grant
- Patent Title: Systems and methods for post-bonding wafer edge seal
- Patent Title (中): 用于后贴合晶片边缘密封的系统和方法
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Application No.: US13771382Application Date: 2013-02-20
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Publication No.: US08841201B2Publication Date: 2014-09-23
- Inventor: Yi-Chuan Teng , Jung-Huei Peng , Shang-Ying Tsai , Hsin-Ting Huang , Lin-Min Hung , Yao-Te Huang , Chin-Yi Cho
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L21/46
- IPC: H01L21/46 ; H01L29/06 ; H01L21/18
Abstract:
A method for fabricating a semiconductor device is disclosed. A first substrate is arranged over a second substrate. A wafer bonding process is performed on the semiconductor device. First regions of the device are enclosed by the bonding process. Second regions of the device remain exposed. One or more processes are performed on the exposed second regions, after performing the wafer bonding process. The one or more processes include a fill process that forms a fill material within the exposed second regions. An edge seal material is applied on the first and second substrates after performing the one or more processes.
Public/Granted literature
- US20140231967A1 SYSTEMS AND METHODS FOR POST-BONDING WAFER EDGE SEAL Public/Granted day:2014-08-21
Information query
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