Invention Grant
US08921187B2 Process to eliminate lag in pixels having a plasma-doped pinning layer
有权
消除具有等离子体掺杂钉扎层的像素滞后的过程
- Patent Title: Process to eliminate lag in pixels having a plasma-doped pinning layer
- Patent Title (中): 消除具有等离子体掺杂钉扎层的像素滞后的过程
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Application No.: US13777197Application Date: 2013-02-26
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Publication No.: US08921187B2Publication Date: 2014-12-30
- Inventor: Gang Chen , Duli Mao , Hsin-Chih Tai , Vincent Venezia , Yin Qian , Howard E. Rhodes
- Applicant: OmniVision Technologies, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely Sokoloff Taylor & Zafman LLP
- Main IPC: H01L27/148
- IPC: H01L27/148 ; H01L27/146

Abstract:
Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed.
Public/Granted literature
- US20140239351A1 PROCESS TO ELIMINATE LAG IN PIXELS HAVING A PLASMA-DOPED PINNING LAYER Public/Granted day:2014-08-28
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