Invention Grant
- Patent Title: Method for fabricating large-area nanoscale pattern
- Patent Title (中): 制造大面积纳米尺度图案的方法
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Application No.: US13242331Application Date: 2011-09-23
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Publication No.: US08956962B2Publication Date: 2015-02-17
- Inventor: Young-Jae Lee , Kyoung Jong Yoo , Jin Su Kim , Jun Lee , Yong In Lee , JunBo Yoon , JeongHo Yeon , Joo-Hyung Lee , Jeong Oen Lee
- Applicant: Young-Jae Lee , Kyoung Jong Yoo , Jin Su Kim , Jun Lee , Yong In Lee , JunBo Yoon , JeongHo Yeon , Joo-Hyung Lee , Jeong Oen Lee
- Applicant Address: KR Seoul
- Assignee: LG Innotek Co., Ltd.
- Current Assignee: LG Innotek Co., Ltd.
- Current Assignee Address: KR Seoul
- Agency: Saliwanchik, Lloyd & Eisenschenk
- Priority: KR10-2010-0129255 20101216
- Main IPC: H01L21/40
- IPC: H01L21/40 ; H01L21/033 ; B82Y10/00

Abstract:
A method for fabricating a large-area nanoscale pattern includes: forming multilayer main thin films isolated by passivation layers; patterning a first main thin film to form a first main pattern; forming a first spacer pattern with respect to the first main pattern; and forming a second main pattern by transferring the first spacer pattern onto a second main thin film. By using multilayer main thin films isolated by different passivation films, spacer lithography capable of reducing a pattern pitch can be repetitively performed, and the pattern pitch is repetitively reduced without shape distortion after formation of micrometer-scale patterns, thereby forming nanometer-scale fine patterns uniformly over a wide area.
Public/Granted literature
- US20120156882A1 METHOD FOR FABRICATING LARGE-AREA NANOSCALE PATTERN Public/Granted day:2012-06-21
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