Invention Grant
- Patent Title: Capacitorless DRAM on bulk silicon
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Application No.: US13918378Application Date: 2013-06-14
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Publication No.: US08971086B2Publication Date: 2015-03-03
- Inventor: Suraj Mathew , Jigish D. Trivedi
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Knobbe Martens Olson & Bear LLP
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C7/00 ; H01L21/84 ; H01L27/108 ; H01L27/12 ; H01L29/78

Abstract:
A method of forming capacitorless DRAM over localized silicon-on-insulator comprises the following steps: A silicon substrate is provided, and an array of silicon studs is defined within the silicon substrate. An insulator layer is defined atop at least a portion of the silicon substrate, and between the silicon studs. A silicon-over-insulator layer is defined surrounding the silicon studs atop the insulator layer, and a capacitorless DRAM is formed within and above the silicon-over-insulator layer.
Public/Granted literature
- US20130279277A1 CAPACITORLESS DRAM ON BULK SILICON Public/Granted day:2013-10-24
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