发明授权
US08977871B2 System and method for power management using a basic input output system
有权
使用基本输入输出系统进行电源管理的系统和方法
- 专利标题: System and method for power management using a basic input output system
- 专利标题(中): 使用基本输入输出系统进行电源管理的系统和方法
-
申请号: US13107133申请日: 2011-05-13
-
公开(公告)号: US08977871B2公开(公告)日: 2015-03-10
- 发明人: Di Tang , Vincent Zimmer , James Edwards , Rahul Khanna , Yufu Li , Abdul Bailey
- 申请人: Di Tang , Vincent Zimmer , James Edwards , Rahul Khanna , Yufu Li , Abdul Bailey
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: G06F1/00
- IPC分类号: G06F1/00 ; G06F1/32
摘要:
A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.
公开/授权文献
- US20120159204A1 SYSTEM AND METHOD FOR POWER MANAGEMENT 公开/授权日:2012-06-21
信息查询